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NCV8184 Micropower 70 mA Low Dropout Tracking Regulator/Line Driver
The NCV8184 is a monolithic integrated low dropout tracking voltage regulator designed to provide an adjustable buffered output voltage that closely tracks (3.0 mV) the reference input. The part can be used in automotive applications with remote sensors, or any situation where it is necessary to isolate the output of your regulator. The NCV8184 also enables the user to bestow a quick upgrade to their module when added current is needed, and the existing regulator cannot provide. The versatility of this part also enables it to be used as a high-side driver.
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SOIC-8 D SUFFIX CASE 751
1
1
DPAK 5-LEAD DT SUFFIX CASE 175AA
* 70 mA Source Capability * Output Tracks within 3.0 mV * Low Input Voltage Tracking Performance * * * * * * *
(Works Down to VREF = 2.1 V) Low Dropout (0.35 V Typ. @ 50 mA) Low Quiescent Current Thermal Shutdown Wide Operating Range Internally Fused Leads in SOIC-8 Package NCV Prefix, for Automotive and Other Applications Requiring Site and Change Control Pb-Free Packages are Available
PIN CONNECTIONS AND MARKING DIAGRAMS
1 VOUT 8184 ALYW G Pin 8184G ALYWW Tab, GND GND Adj VIN GND GND VREF/ENABLE
1. VIN 2. VOUT 3. GND 4. Adj 5. VREF/ENABLE
1 8184 A L Y W, WW G or G = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
VIN Current Limit & Saturation Sense Adj VREF/ENABLE - +
VOUT
ORDERING INFORMATION
Device NCV8184D GND BIAS Thermal Shutdown NCV8184DG NCV8184DR2 NCV8184DR2G NCV8184DTRK NCV8184DTRKG Package SOIC-8 SOIC-8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) DPAK DPAK (Pb-Free) Shipping 98 Units / Tube 98 Units / Tube 2500/Tape & Reel 2500/Tape & Reel 2500/Tape & Reel 2500/Tape & Reel
Figure 1. Block Diagram
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 1 Publication Order Number: NCV8184/D
(c) Semiconductor Components Industries, LLC, 2006
May, 2006 - Rev. 18
NCV8184
MAXIMUM RATINGS
Rating Storage Temperature Supply Voltage Range (continuous) Supply Voltage Operating Range Peak Transient Voltage (VIN = 14 V, Load Dump Transient = 28 V) Voltage Range (VOUT, Adj) Voltage Range (VREF/ENABLE) Maximum Junction Temperature ESD Capability Human Body Model Machine Model Charge Device Model Reflow: (SMD styles only) (Note 1) Value -65 to 150 -15 to 42 4.0 to 42 42 -3.0 to 42 -0.3 to 42 150 2.5 200 1000 240 peak 260 peak (Pb-Free) (Note 2) Unit C V V V V V C kV V V C
Lead Temperature Soldering:
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. 60 second maximum above 183C. 2. -5C / +0C Allowable Conditions, applies to both Pb and Pb-Free devices.
THERMAL CHARACTERISTICS See Package Thermal Data Section (Page 8) ELECTRICAL CHARACTERISTICS (VIN = 14 V; VREF/ENABLE > 2.1 V; -40C < TJ < +150C; COUT = 1.0 mF;
IOUT = 1.0 mA; Adj = VOUT; COUT-ESR = 1.0 W, unless otherwise specified.) Parameter Regular Output VREF/ENABLE - VOUT VOUT Tracking Error Dropout Voltage (VIN - VOUT) 5.7 V VIN 26 V, 100 mA IOUT 60 mA 2.1 V VREF/ENABLE (VIN - 600 mV) IOUT = 100 mA IOUT = 5.0 mA IOUT = 60 mA 5.7 V VIN 26 V, VREF/ENABLE = 5.0 V 100 mA IOUT 60 mA, VREF/ENABLE = 5.0 V VREF/ENABLE = 5.0 V VIN = 14 V, VREF/ENABLE = 5.0 V, VOUT = 90% of Adj VIN = 12 V, IOUT = 60 mA VIN = 12 V, IOUT = 100 mA VIN = 12 V, VREF/ENABLE = 0 V f = 120 Hz, IOUT = 60 mA, 6.0 V VIN 26 V Guaranteed by Design -3.0 - - - - - - 70 - - - 60 150 - 100 250 350 - - 0.2 - 5.0 50 - - 180 3.0 150 500 600 3.0 3.0 6.0 400 7.0 70 20 - 210 mV mV mV mV mV mV mA mA mA mA mA dB C Test Conditions Min Typ Max Unit
Line Regulation Load Regulation Adj Input Bias Current Current Limit Quiescent Current (IIN - IOUT)
Ripple Rejection Thermal Shutdown VREF/ENABLE Enable Voltage Input Bias Current
- VREF/ENABLE = 5.0 V
0.8 -
- 0.2
2.1 3.0
V mA
PACKAGE PIN DESCRIPTION
Package Lead Number SOIC-8 8 1 2, 3, 6, 7 4 5 DPAK, 5-LEAD 1 2 Tab, 3 4 5 Lead Symbol VIN VOUT GND Adj VREF/ENABLE Battery supply input voltage. Regulated output. Ground. Adjust lead, noninverting input. Reference voltage and ENABLE input. Function
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NCV8184
TYPICAL PERFORMANCE CHARACTERISTICS
0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 1.0 0.8 TRACKING ERROR (mV) 0.6 0.4 0.2 +25C 0.0 -0.2 -0.4 -0.6 0 10 20 30 40 50 OUTPUT CURRENT (mA) 60 70 +125C -40C
TRACKING ERROR (mV)
Figure 2. Tracking Error vs. Temperature
Figure 3. Tracking Error vs. Output Current
50 45 40 35 ESR (W)
VOUT = 5.0 V
4.0 3.5 Stable Region 3.0 Unstable Region ESR (W) 2.5 2.0 1.5
30 25 20 15 10 5 0 0 10 C2 = 10 mF C2 = 0.1 mF
Unstable Region
1.0 0.5 Stable Region 60 70
Data is for 0.1 mF only. Capacitor values 0.5 mF and above do not exhibit instability with low ESR. 0 10
C2 = 0.1 mF VOUT = 5.0 V 60 70
50 20 30 40 OUTPUT CURRENT (mA)
0.0
20 30 40 50 OUTPUT CURRENT (mA)
Figure 4. Output Stability with Capacitor Change
Figure 5. Output Stability with 0.1 mF at Low ESR
12 QUIESCENT CURRENT (mA) 10 8 +25C 6 -40C 4 2 0 +125C QUIESCENT CURRENT (mA)
2.5 VREF / ENABLE = 5.0 V 2 IOUT = 20 mA
1.5
1
0.5 IOUT = 1 mA
0
10
20 30 40 50 OUTPUT CURRENT (mA)
60
70
0
0
5
10 15 INPUT VOLTAGE (V)
20
25
Figure 6. Quiescent Current vs. Output Current
Figure 7. Quiescent Current vs. Input Voltage
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NCV8184
TYPICAL PERFORMANCE CHARACTERISTICS
0.5 OUTPUT VOLTAGE VOUT (V) +125C +25C 0.3 6 5 4 +25C 3 +125C 2 1 -40C 0.0 0 10 20 30 40 50 OUTPUT CURRENT (mA) 60 70 0 0 5 VREF/ENABLE = 5.0 V 10 15 20 INPUT VOLTAGE VIN (V) 25 30
DROPOUT VOLTAGE (V)
0.4
0.2
-40C
0.1
Figure 8. Dropout Voltage vs. Output Current
Figure 9. Output Voltage vs. Input Voltage
7 REFERENCE CURRENT (mA) 0 1 2 3 4 5 REFERENCE VOLTAGE (V) 6 7 6 OUTPUT VOLTAGE (V) 5 4 3 2 1 0
0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 1 2 3 4 5 REFERENCE VOLTAGE (V) 6 7
Figure 10. Output Voltage vs. Reference Voltage
Figure 11. Reference Current vs. Reference Voltage
120 THERMAL RESISTANCE, JUNCTION TO AMBIENT, RqJA, (C/W) 115 110 105 100 95 90 85 80 0 1 2 3 4 COPPER AREA (in2) 5 6
Figure 12. SOIC-8, qJA as a Function of the Pad Copper Area (2.0 oz. Cu Thickness), Board Material = 0.0625 G-10/R-4
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NCV8184
CIRCUIT DESCRIPTION
ENABLE Function Output Voltage
By pulling the VREF/ENABLE lead below 0.8 V, (see Figure 16 or Figure 17), the IC is disabled and enters a sleep state where the device draws less than 20 mA from supply. When the VREF/ENABLE lead is greater than 2.1 V, VOUT tracks the VREF/ENABLE lead normally.
The output is capable of supplying 70 mA to the load while configured as a similar (Figure 13), lower (Figure 15), or higher (Figure 14) voltage as the reference lead. The Adj lead acts as the inverting terminal of the op amp and the VREF lead as the non-inverting. The device can also be configured as a high-side driver as displayed in Figure 18.
VOUT, 70 mA Loads VOUT C2** GND 10 mF RF GND Adj RA
NCV8184
NCV8184
VOUT, 70 mA Loads VOUT C2** GND 10 mF GND Adj
VIN GND GND C3*** 10 nF C1* 1.0 mF
B+
VIN GND GND C3*** 10 nF C1* 1.0 mF
B+
VREF/ ENABLE
5.0 V
VREF/ ENABLE
VREF
VOUT + VREF
R VOUT + VREF(1 ) E) RA
Figure 13. Tracking Regulator at the Same Voltage
VOUT, 70 mA Loads VOUT C2** GND 10 mF GND Adj
Figure 14. Tracking Regulator at Higher Voltages
VOUT, 70 mA VOUT GND GND VIN GND GND R C3*** 10 nF VREF C1* 1.0 mF B+
NCV8184
GND GND
C1* 1.0 mF R1 C3*** 10 nF VREF R2
C2** 10 mF
VREF/ ENABLE
Adj from MCU
VREF/ ENABLE
VOUT + VREF( R2 ) R1 ) R2
Figure 15. Tracking Regulator at Lower Voltages
VIN 100 nF 70 mA To Load 10 mF (e.g. sensor) VOUT GND GND Adj VIN GND GND I/O C3*** 10 nF C1* 1.0 mF mC VREF (5.0 V)
Figure 16. Tracking Regulator with ENABLE Circuit
6.0 V-40 V
NCV8501
NCV8184
70 mA
NCV8184
VIN
B+
VOUT GND GND Adj
VIN GND GND C3*** 10 nF
B+
NCV8184
VREF/ ENABLE
MCU
VREF/ ENABLE
VOUT + B ) * VSAT
Figure 17. Alternative ENABLE Circuit
* C1 is required if the regulator is far from the power source filter. ** C2 is required for stability. *** C3 is recommended for EMC susceptibility
Figure 18. High-Side Driver
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NCV8184
APPLICATION NOTES
VOUT Short to Battery
The NCV8184 will survive a short to battery when hooked up the conventional way as shown in Figure 19. No damage to the part will occur. The part also endures a short to battery when powered by an isolated supply at a lower voltage as in
Short to battery
Figure 20. In this case the NCV8184 supply input voltage is set at 7.0 V when a short to battery (14 V typical) occurs on VOUT which normally runs at 5.0 V. The current into the device (ammeter in Figure 20) will draw additional current as displayed in Figure 21.
Loads
VOUT 70 mA C2** 10 mF
B+ VOUT GND GND Adj NCV8184 VIN GND GND 5.0 V + 5.0 V - C1* 1.0 mF + Automotive Battery - typically 14 V
VREF/ ENABLE
C3*** 10 nF
VOUT = VREF
Figure 19.
Short to battery A Automotive Battery typically 14 V VOUT 70 mA VOUT GND GND Adj * C1 is required if the regulator is far from the power source filter. ** C2 is required for stability. *** C3 is recommended for EMC susceptibility. NCV8184 VIN GND GND 5.0 V + 5.0 V - B+ C1* 7V 1.0 mF + -
Loads
C2** 10 mF
VREF/ ENABLE
VOUT = VREF
C3*** 10 nF
Figure 20.
18 16 14 CURRENT (mA) 12 10 8 6 4 2 0 5 6 7 8 9 10 1112 1314 15 1617 1819 20 2122 2324 25 26 VOUT VOLTAGE (V) VOUT VOUT GND GND Adj NCV8184 C2 10 mF VIN GND GND < 1.0 mA
Switched Application
The NCV8184 has been designed for use in systems where the reference voltage on the VREF/ENABLE pin is continuously on. Typically, the current into the VREF/ENABLE pin will be less than 1.0 mA when the voltage on the VIN pin (usually the ignition line) has been switched out (VIN can be at high impedance or at ground.) Reference Figure 22.
Ignition Switch C1 1.0 mF VBAT
Figure 21. VOUT Short to Battery
VREF/ ENABLE
VREF 5.0 V
Figure 22.
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NCV8184
External Capacitors
The output capacitor for the NCV8184 is required for stability. Without it, the regulator output will oscillate. Actual size and type may vary depending upon the application load and temperature range. Capacitor effective series resistance (ESR) is also a factor in the IC stability. Worst-case is determined at the minimum ambient temperature and maximum load expected. The output capacitor can be increased in size to any desired value above the minimum. One possible purpose of this would be to maintain the output voltage during brief conditions of negative input transients that might be characteristic of a particular system. The capacitor must also be rated at all ambient temperatures expected in the system. To maintain regulator stability down to -40C, a capacitor rated at that temperature must be used. More information on capacitor selection for SMART REGULATOR(R)s is available in the SMART REGULATOR application note, "Compensation for Linear Regulators," document number SR003AN/D, available through our website at http://www.onsemi.com.
Calculating Power Dissipation in a Single Output Linear Regulator
The value of RqJA can then be compared with those in the Package Thermal Data Section of the data sheet. Those packages with RqJA's less than the calculated value in equation 2 will keep the die temperature below 150C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heat sink will be required.
IIN VIN
SMART REGULATOR(R)
IOUT VOUT
Control Features
IQ
Figure 23. Single Output Regulator with Key Performance Parameters Labeled Heatsinks
The maximum power dissipation for a single output regulator (Figure 23) is:
PD(max) + {VIN(max) * VOUT(min)} IOUT(max) ) VIN(max)IQ
(eq. 1)
A heatsink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RqJA:
RqJA + RqJC ) RqCS ) RqSA
(eq. 3)
where: VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current, for the application,and IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of PD(max) is known, the maximum permissible value of RqJA can be calculated:
RqJA + 150C * TA PD
(eq. 2)
where: RqJC = the junction-to-case thermal resistance, RqCS = the case-to-heatsink thermal resistance, and RqSA = the heatsink-to-ambient thermal resistance. RqJC appears in the package section of the data sheet. Like RqJA, it is a function of package type. RqCS and RqSA are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heatsink manufacturers.
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NCV8184
PACKAGE THERMAL DATA
Test Conditions Parameter SOIC-8 Package Junction-to-Case top (Y-JT, YJT) Junction-to-Pin 8 (Y-JL8, YJL8) Junction-to-Ambient (RqJA, qJA) DPAK 5-Pin Package Junction-to-Board (Y-JB, YJB) Junction-to-Pin 3 (tab) (Y-JL3, YJL3) Junction-to-Ambient (RqJA, qJA) 0.5 in2 Min-Pad Board (Figure 24) 39 63 121 Spreader Board (Figure 26) 15 16 100 1.0 in2 Typical Value 1.0 in Pad Board (Figure 25) 32 58 98 Spreader Board (Figure 27) 15 16 69 C/W C/W C/W C/W C/W C/W Units
Figure 24. 2.0 oz. copper, 40 mil traces
Figure 25. 1.0 oz. copper, approx. 1/8 in2 per lead, 1.0 in2 total
Figure 26. 1.0 oz. copper, 0.3 in2 drain pad, 0.5 in2 including traces
Figure 27. 2.0 oz. copper, 0.5 in2 drain pad, 1.0 in2 including traces
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NCV8184
Table 1. SOIC-8 Thermal RC Network Models*
Board Type (SPICE Deck Format) C_C1 C_C2 C_C3 C_C4 C_C5 C_C6 C_C7 C_C8 C_C9 R_R1 R_R2 R_R3 R_R4 R_R5 R_R6 R_R7 R_R8 R_R9 Junction node1 node2 node3 node4 node5 node6 node7 node8 Junction node1 node2 node3 node4 node5 node6 node7 node8 Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd node1 node2 node3 node4 node5 node6 node7 node8 node9 Min-Pad Min 7.06879E-7 3.34499E-6 1.00350E-5 3.68358E-5 4.29554E-4 7.20791E-3 3.52182E-2 7.16622E-1 6.57830E+0 Min 5.17805E-1 1.55341E+0 4.66024E+0 4.98386E+0 1.04570E+1 1.14509E+1 3.94880E+1 3.10554E+1 1.77562E+1 1.0 inch Pad 1.0 inch 7.06879E-7 3.34499E-6 1.00350E-5 3.68358E-5 4.29554E-4 7.20791E-3 3.76156E-2 1.33747E+0 3.97588E+0 1.0 inch 5.1780E-1 1.5534E+0 4.6602E+0 4.9838E+0 1.0457E+1 1.1450E+1 2.9500E+1 1.6877E+1 1.8812E+1 C/W C/W C/W C/W C/W C/W C/W C/W C/W Units W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C Min-Pad Tau 2.99E-7 4.40E-6 4.48E-5 2.46E-4 4.72E-3 7.18E-2 1.61E+0 2.08E+1 1.33E+2 R's 0.34137 0.83581 2.36526 6.76959 10.39190 8.68648 38.62760 27.65780 26.24690 1.0 inch Pad Tau 2.99E-7 4.40E-6 4.48E-5 2.46E-4 4.72E-3 7.25E-2 1.31E+0 1.62E+1 1.08E+2 R's 0.34137 0.83581 2.36526 6.76960 10.39200 8.81855 31.37390 8.93175 28.98470 C/W C/W C/W C/W C/W C/W C/W C/W C/W Units sec sec sec sec sec sec sec sec sec Cauer Network Foster Network
Table 2. DPAK 5-Lead Thermal RC Network Models*
Drain Copper Area (1 oz thick) (SPICE Deck Format) C_C1 C_C2 C_C3 C_C4 C_C5 C_C6 C_C7 C_C8 C_C9 C_C10 R_R1 R_R2 R_R3 R_R4 R_R5 R_R6 R_R7 R_R8 R_R9 R_R10 Junction node1 node2 node3 node4 node5 node6 node7 node8 node9 Junction node1 node2 node3 node4 node5 node6 node7 node8 node9 Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd node1 node2 node3 node4 node5 node6 node7 node8 node9 gnd 100 mm2 100 mm2 1.51E-06 6.00E-06 1.90E-05 1.05E-04 2.98E-03 2.37E-02 4.95E-02 2.32E-01 6.95E-01 6.91E+00 100 mm2 0.845 1.886 4.758 5.336 3.735 10.537 19.583 38.068 43.000 16.884 653 mm2 653 mm2 1.51E-06 5.91E-06 1.81E-05 9.59E-05 3.21E-03 7.87E-02 7.88E-02 1.03E+00 1.58E+00 1.16E+01 653 mm2 0.850 1.933 5.070 4.862 3.201 5.293 6.828 13.172 16.466 8.868 C/W C/W C/W C/W C/W C/W C/W C/W C/W C/W Units W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C 100 mm2 Tau 1.00E-06 1.00E-05 1.00E-04 7.00E-04 1.03E-02 1.71E-01 1.17E+00 7.63E+00 3.93E+01 1.42E+02 R's 0.507 1.096 3.467 7.168 3.394 4.000 15.000 20.000 50.000 40.000 653 mm2 Tau 1.00E-06 1.00E-05 1.00E-04 6.00E-04 1.03E-02 1.71E-01 1.17E+00 7.63E+00 3.93E+01 1.42E+02 R's 0.507 1.096 3.467 7.168 3.394 0.720 8.912 3.636 15.161 22.480 C/W C/W C/W C/W C/W C/W C/W C/W C/W C/W Units sec sec sec sec sec sec sec sec sec sec Cauer Network Foster Network
*Bold face items in the tables above represent the package without the external thermal system.
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NCV8184
The Cauer networks generally have physical significance and may be divided between nodes to separate thermal behavior due to one portion of the network from another. The Foster networks, though when sorted by time constant (as above) bear a rough correlation with the Cauer networks, are really only convenient mathematical models. Cauer networks can be easily implemented using circuit simulating tools, whereas Foster networks may be more easily implemented using mathematical tools (for instance, in a spreadsheet program), according to the following formula:
R(t) +
S1 Ri 1-e-t taui i+
n
Copper Area (in2) 0 160 150 140 130 qJA (C/W) 120 110 100 90 80 70 60 50 0 100 200 300 Copper Area (mm2) 400 500 600 700 2.0 oz. Cu 1.0 oz. Cu 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1
Figure 28. DPAK 5-Lead, qJA as a Function of the Pad Copper Area Including Traces, Board Material 0.62" Thick FR4
100 50% Duty Cycle RqJA 1.0 in. pad (C/W)
20% 10% 5% 2% Non-Normalized Response 0.00001 0.0001 0.001 0.1 0.01 Pulse Width (s) 1 10 100 1000
10
1% 1 0.000001
Figure 29. SOIC-8 Thermal Duty Cycle Curves on 1.0 in. Spreader Test Board
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100 Rq (C/W) EFFECTIVE THERMAL RESISTANCE 50% Duty Cycle 20% 10 10% 5% 2% 1 1% Single Pulse (1.0 in pad PCB) Die Size = 2.08 x 1.55 x 0.40 5.0% Active Area 0.00001 0.0001 0.001 0.01 t1 (s) 0.1 1 Notes: PDM t1 t2 t1 Duty Cycle, D = t 2 10 100 1000
0.1 0.000001
Figure 30. DPAK 5-Lead Thermal Duty Cycle Curves on 1.0 in. Spreader Test Board
1000 Die Size = 2.08 x 1.55 x 0.40 5.0% Active Area 100 Rq (C/W) min pad (Cu Area = 100 mm2)
10
1.0 in pad (Cu Area = 653 mm2)
1
0.1 0.000001
0.00001
0.0001
0.001
0.01
0.1 Time (s)
1
10
100
1000
Figure 31. DPAK 5-Lead Thermal Transient Response on Typical Test Boards
Junction R1 R2 R3 Rn
C1
C2
C3
Cn
Time constants are not simple RC products. Amplitudes of mathematical solution are not the resistance values.
Ambient (thermal ground)
Figure 32. Grounded Capacitor Thermal Network ("Cauer" Ladder)
Junction R1 R2 R3 Rn
C1
C2
C3
Cn
Each rung is exactly characterized by its RC-product time constant; Amplitudes are the resistances
Ambient (thermal ground)
Figure 33. Non-Grounded Capacitor Thermal Ladder ("Foster" Ladder)
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NCV8184
PACKAGE DIMENSIONS
SOIC-8 NB CASE 751-07 ISSUE AH
-X- A
8 5
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060
7.0 0.275
4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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NCV8184
PACKAGE DIMENSIONS
DPAK 5, CENTER LEAD CROP CASE 175AA-01 ISSUE A
SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH.
-T- B V R C E
R1
S
A
1234 5
Z U
K F L D G
5 PL
J H 0.13 (0.005)
M
T
DIM A B C D E F G H J K L R R1 S U V Z
INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.020 0.028 0.018 0.023 0.024 0.032 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.045 BSC 0.170 0.190 0.185 0.210 0.025 0.040 0.020 --- 0.035 0.050 0.155 0.170
MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.51 0.71 0.46 0.58 0.61 0.81 4.56 BSC 0.87 1.01 0.46 0.58 2.60 2.89 1.14 BSC 4.32 4.83 4.70 5.33 0.63 1.01 0.51 --- 0.89 1.27 3.93 4.32
SOLDERING FOOTPRINT*
6.4 0.252 2.2 0.086
5.8 0.228
0.34 5.36 0.013 0.217
10.6 0.417
SCALE 4:1 mm inches
0.8 0.031
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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NCV8184/D

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